As the digital system becomes complicated, blocks having various functions must be integrated into one chip. For example, in case there is a block to process a digital signal and there is a microcontroller to control it, the velocity of the microcontroller is accordingly determined by an application program since it processes a software. However, in case there is a digital signal process block, the operational velocity is defined since the input digital signal format is fixed. Due to this fact, a different clock is used in one chip.
In this case, the microcontroller sets various data values and passes them to a digital signal processing block so as to control it. Then, when finishing calculating using the data values set by the microcontroller, the microcontroller block executes a next instruction by reading a digital signal processing value. During these procedures, in order for the microcontroller to execute a write(and/or read) operation, it requires an operation to write(and/or read) values into(and/or from) a digital signal processing register. In these procedures, the address and data values that are synchronized with the clock of the microcontroller are recognized by the clock of the digital signal processing block. Therefore, it is required that the address and data values be synchronized with the clock of the digital signal processing block.
Also, the addresses and data values are controlled by a microcontroller as well as one value of a signal which is processed by the digital signal process block becomes one input signal of the microcontroller.
In this case, it is required that the control signal of the digital signal processing block be synchronized with the clock of the microcontroller, as with the control operation by the microcontroller. As such, it is necessarily required that multi-function blocks operating at different clocks in one chip be synchronized with one another.
As such, after converting an input signal into a short pulse, the conventional synchronizing circuit is kept one block of the reference clock by the converted pulse. The synchronizing circuit consists of a ready circuit for converting the input signal into a short pulse and resetting using the short pulse, and a circuit for making a synchronized signal using the short pulse.
In addition, in an instant when the state of the input asynchronous signal is converted, the signal used to synchronize becomes unstable since a data is maintained unstable. Due to this problem, a stabilized input asynchronous signal is synchronized by means of a logic AND multiplying the input asynchronous signal to the reference signal and a delay. A synchronous signal is reset by sensing a falling interval of the input signal.